News

Design And Reuse3m
EnSilica expands satcoms user terminal portfolio with dual-beam, dual-polarization Ku-band analogue beamformer chipset
The ENS92051 is the dual-beam Ku-band receiver (Rx) supporting eight channels with separate amplitude and phase control. The Rx carrier frequency range is 10.7 to 12.75 GHz with an instantaneous ...
Design And Reuse8m
GlobalFoundries partners with A*STAR to accelerate advanced packaging innovation
SINGAPORE -- May, 20 2025 – GlobalFoundries (Nasdaq: GFS) (GF) today announced plans to expand its capabilities in advanced packaging through a new Memorandum of Understanding (MOU) signed with the ...
Design And Reuse23h
Expedera s Origin Evolution NPU IP Brings Generative AI to Edge Devices
Expedera launches its Origin Evolution NPU IP, bringing hardware acceleration to meet the computational demands of running ...
Design And Reuse17h
Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA
Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports ...
Design And Reuse1d
BrainChip CTO to Present on Architectural Innovation for Low-Power AI at the Embedded Vision Summit
Attendees of the Summit can visit BrainChip at booth #716 to see live demonstrations of the company’s latest advancements in Edge AI technology, including innovations in on-chip language processing, ...
Design And Reuse1d
PolarFire Core devices streamline costs while retaining the market-leading power efficiency, security and reliability of classic PolarFire families
PolarFire Core devices are supported by Microchip’s Libero® SoC Design Suite, SmartHLS™ compiler, VectorBlox™ Accelerator SDK and Microchip’s Mi-V ecosystem of partner platforms for rapid RISC-V ...
Design And Reuse1d
Boosting RISC-V SoC performance for AI and ML applications
At around the same time, the open and configurable RISC-V instruction set architecture (ISA) is experiencing rapid adoption across diverse markets. This growth aligns with rising SoC complexity and ...
Design And Reuse1d
sureCore extends its sureFIT design service to include custom memory solutions for AI applications
Sheffield, UK – 20 May 2025. SureCore, the leading memory specialist, has announced the expansion of its sureFIT design service to include AI applications, using its memory design expertise to help AI ...
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Rapid eFPGA Configurator
A Paradigm Shift in eFPGA Customization. Advancing Programmability in the Next Generation of SoCs . In an era of continual ...
Design And Reuse2d
Secure-IC at Computex 2025: Enabling Trust in AI, Chiplets, and Quantum-Ready Systems
In a landscape defined by AI acceleration , chiplet-based system integration, and upcoming post-quantum challenges, Secure-IC ...
Design And Reuse2d
NVIDIA Unveils NVLink Fusion for Industry to Build Semi-Custom AI Infrastructure With NVIDIA Partner Ecosystem
COMPUTEX - May 19, 2025 — NVIDIA today unveiled NVIDIA NVLink Fusion™ — new silicon that lets industries build semi-custom AI infrastructure with the vast ecosystem of partners building with NVIDIA ...
Design And Reuse2d
RISC-V Technology Seeing Growing Maturity and Penetration
An interesting data point presented by analyst Richard Wawrzyniak of the SHD Group highlighted the growing maturity and penetration of RISC-V technology: an expected flip from license-driven revenue ...